Design of 16X16 SRAM Array Using 7T SRAM Cell for Low Power Applications - Bisht, Rashmi; Pranav, Ashutosh (Journal of Graphic Era University, 2023)
<span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*302.81px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(1.00533);" role="presentation">Static Random Access Memory (SRAM) plays a vital role in various applications like cache memories, <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*316.01px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.924277);" role="presentation">microprocessors and portable <span dir="ltr" style="left: calc(var(--scale-factor)*197.81px); top: calc(var(--scale-factor)*316.01px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.970044);" role="presentation">devices. As the technology’s node scaling down, leakage power is the major <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*329.21px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.897953);" role="presentation">problem in SRAM cell concerned for the low power applications. So, there is a requirement of low power adequate <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*342.41px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.917502);" role="presentation">memory design. The main goal of this paper is to design a low power 1<span dir="ltr" style="left: calc(var(--scale-factor)*358.51px); top: calc(var(--scale-factor)*342.41px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.950011);" role="presentation">6X16 SRAM array using 7T SRAM cell. <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*355.73px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.923225);" role="presentation">The proposed architecture of 16X16 SRAM array is similar to 16X16 SRAM array using conventional 6T SRAM <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*368.93px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.9834);" role="presentation">cell, only one additional NMOS transistor is placed between pull down transistors and ground node. This <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*382.13px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.905107);" role="presentation">architecture <span dir="ltr" style="left: calc(var(--scale-factor)*121.70px); top: calc(var(--scale-factor)*382.13px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.906697);" role="presentation">reduces static power in standby mode. Cadence (version 6.1.5) simulation tool is used for designing. <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*395.33px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.908913);" role="presentation">Comparative analysis is performed in terms of total power consumption. Peripheral components of complete 16X <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*408.55px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.880144);" role="presentation">16 SRAM array has been designed such as SRAM <span dir="ltr" style="left: calc(var(--scale-factor)*271.01px); top: calc(var(--scale-factor)*408.55px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.916511);" role="presentation">cell, write driver circuit, precharge circuit, row /column decoder <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*421.87px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.917882);" role="presentation">and sense amplifier. For noise reduction during read operation, Differential type sense amplifier is used that has <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*435.07px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.909951);" role="presentation">the ability of common mode noise voltage rejection. Power Consumption of 1<span dir="ltr" style="left: calc(var(--scale-factor)*380.23px); top: calc(var(--scale-factor)*435.07px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.936089);" role="presentation">6X16 SRAM array using 7T SRAM <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*448.27px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.903915);" role="presentation">cell is 20.04mW is measured that is 18.4% less compared to 16X16 SRAM array using 6T SRAM array. Transient <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*461.47px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.929887);" role="presentation">analysis of write and read operations for both logic -<span dir="ltr" style="left: calc(var(--scale-factor)*284.93px); top: calc(var(--scale-factor)*461.47px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.937497);" role="presentation">0 and logic -<span dir="ltr" style="left: calc(var(--scale-factor)*336.31px); top: calc(var(--scale-factor)*461.47px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.915673);" role="presentation">1 is performed. For designing standard <span dir="ltr" style="left: calc(var(--scale-factor)*496.18px); top: calc(var(--scale-factor)*461.47px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.964235);" role="presentation">GPDK <span dir="ltr" style="left: calc(var(--scale-factor)*72.02px); top: calc(var(--scale-factor)*474.67px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.906058);" role="presentation">(generic <span dir="ltr" style="left: calc(var(--scale-factor)*107.18px); top: calc(var(--scale-factor)*474.67px); font-size: calc(var(--scale-factor)*9.96px); font-family: sans-serif; transform: scaleX(0.910133);" role="presentation">process design kit) 180nm library is used.